The theorem and conditions on identifying undetectable faults can be acquired by applying combinational ATPG to ILA in sequential circuits; and the conditions are given for faulty circuit.
对时序电路的迭代逻辑阵列(ILA)施加组合ATPG(自动测试模式生成),可得到不可测故障识别的定理和条件,其条件针对故障电路给出。
This paper introduces fault model and design flow of the ATPG (automatic test pattern generation) techniques, which are utilized to test RSIC CPU manufacturing defects along with DFT(design for test) technology.
介绍了自动测试模式生成的测试故障模型和设计流程，以及自动测试模式生成结合可测性设计技术在测试ＲＳＩＣ ＣＰＵ制造缺陷中的应
The goal of Automatic Test Pattern Generation(ATPG) is to reduce generation time and improve quality of test pattern, and the two key steps of ATPG are generation and optimization of test pattern set.
本文以航天科工集团公司课题:“面向数字测试的自动测试模式生成开发环境”为背景,针对数字电路测试和故障诊断中的测试生成问题,以基本蚁群算法为基础,研究数字电路测试模式的生成和优化技术。